Marina Alonso

Publications

1. Marina Alonso, Salvador Coll, Juan Miguel Martínez, Vicente Santonja, Pedro Lopez and Jose Duato. Power saving in regular interconnection networks. Parallel Computing 36(12):696 - 712, 2010. URL, DOI BibTeX

   @article{MarinaAlonso|Coll2010696,
   	author = "Alonso, Marina and Coll, Salvador and Mart{\'i}nez, Juan Miguel and Santonja, Vicente and Lopez, Pedro and Duato, Jose",
   	abstract = "The high level of computing power required for some applications can only be achieved by multiprocessor systems. These systems consist of several processors that communicate by means of an interconnection network. The huge increase both in size and complexity of high-end multiprocessor systems has triggered up their power consumption. Complex cooling systems are needed, which, in turn, increases power consumption. Power consumption reduction techniques are being applied everywhere in computer systems and the interconnection network is not an exception, as its contribution is not negligible. In this paper, we propose a mechanism to reduce interconnect power consumption that combines two alternative techniques: (i) dynamically switching on and off network links as a function of traffic (any link can be switched off, provided that network connectivity is guaranteed), (ii) dynamically reducing the available network bandwidth when traffic becomes low. In both cases, the topology of the network is not modified. Therefore, the same routing algorithm can be used regardless of the power saving actions taken, thus simplifying router design. Our simulation results show that the network power consumption can be greatly reduced, at the expense of some increase in latency. However, the achieved power reduction is always higher than the latency penalty.",
   	doi = "DOI: 10.1016/j.parco.2010.08.003",
   	issn = "0167-8191",
   	journal = "Parallel Computing",
   	keywords = "Power saving; Interconnection networks; Routing",
   	number = 12,
   	pages = "696 - 712",
   	title = "{P}ower saving in regular interconnection networks",
   	url = "http://www.sciencedirect.com/science/article/B6V12-50VTWG7-1/2/7972b8869966237a0ab6b680fd5fa6ba",
   	volume = 36,
   	year = 2010
   }
   

2. Marina Alonso, Salvador Coll, Vicente Santonja, Juan Miguel Martínez, Pedro Lopez and Jose Duato. Power-aware fat-tree networks using on/off links. In R Perrott, BM Chapman, J Subhlok, RF DeMello and LT Yang (eds.). HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS, PROCEEDINGS 4782. 2007, 472-483. BibTeX

   @conference{ISI:000250940200040,
   	author = "Alonso, Marina and Coll, Salvador and Santonja, Vicente and Mart{\'i}nez, Juan Miguel and Lopez, Pedro and Duato, Jose",
   	abstract = "Nowadays, power consumption reduction techniques are being increasingly used in computer systems, and high-performance computing systems are not an exception. In particular, the power consumed by the interconnect circuitry has a non-negligible contribution to the total system budget. In this scenario, fat-tree interconnection networks are one of the most popular topologies. This topology is particularly well-suited for applying power consumption reduction techniques since it provides multiple alternative paths for each source/destination pair. In this paper, we present a mechanism that dynamically adjusts the available network bandwidth by switching links on and off, according to the traffic requirements. This mechanism provides significant reduction in power consumption while maintaining the original underlying routing algorithm, at the expense of slight latency increase for low loads.",
   	booktitle = "HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS, PROCEEDINGS",
   	editor = "Perrott, R and Chapman, BM and Subhlok, J and DeMello, RF and Yang, LT",
   	isbn = "978-3-540-75443-5",
   	issn = "0302-9743",
   	note = "3rd International Conference on High Performance Computing and Communications (HPCC 2007), Houston, TX, SEP 26-28, 2007",
   	pages = "472-483",
   	series = "LECTURE NOTES IN COMPUTER SCIENCE",
   	title = "{P}ower-aware fat-tree networks using on/off links",
   	volume = 4782,
   	year = 2007
   }
   

3. Marina Alonso, Salvador Coll, Jose Maria Martínez, Vicente Santonja, Pedro Lopez and Jose Duato. Dynamic power saving in fat-tree interconnection networks using on/off links. In Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International. April 2006, 8 pp.. URL, DOI BibTeX

   @conference{1639599,
   	author = "Alonso, Marina and Coll, Salvador and Mart{\'i}nez, Jose Maria and Santonja, Vicente and Lopez, Pedro and Duato, Jose",
   	abstract = "Current trends in high-performance parallel computers show that fat-tree interconnection networks are one of the most popular topologies. The particular characteristics of this topology, that provide multiple alternative paths for each source/destination pair, make it an excellent candidate for applying power consumption reduction techniques. Such techniques are being increasingly applied in computer systems and the interconnection network is not an exception, since its contribution to the system power budget is not negligible. In this paper, we present a mechanism that dynamically switches on and off network links as a function of traffic. The mechanism is designed to guarantee network connectivity, according to the underlying routing algorithm. In this way, the default routing algorithm can be used regardless of the power saving actions taken, thus simplifying router design. Our simulation results show that significant network power consumption reductions can be obtained at no cost. Latency remains the same although the number of operating network links is dynamically adjusted.",
   	booktitle = "Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International",
   	doi = "10.1109/IPDPS.2006.1639599",
   	isbn = "0-7695-0990-8",
   	keywords = "dynamic power saving; fat-tree interconnection networks; high-performance parallel computers; network power consumption reduction; on-off links; routing algorithm; energy conservation; multiprocessor interconnection networks; parallel processing;",
   	month = "april",
   	pages = "8 pp.",
   	title = "{D}ynamic power saving in fat-tree interconnection networks using on/off links",
   	url = "http://dx.doi.org/10.1109/IPDPS.2006.1639599",
   	year = 2006
   }
   

4. Marina Alonso, Salvador Coll, Juan Miguel Martínez, Vicente Santonja, Pedro Lopez and Jose Duato. Dynamic power saving in fat-tree interconnection networks using on/off links. In Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International. 2006, 8 pp. -. URL, DOI BibTeX

   @conference{8978456,
   	author = "Alonso, Marina and Coll, Salvador and Mart{\'i}nez, Juan Miguel and Santonja, Vicente and Lopez, Pedro and Duato, Jose",
   	abstract = "Current trends in high-performance parallel computers show that fat-tree interconnection networks are one of the most popular topologies. The particular characteristics of this topology, that provide multiple alternative paths for each source/destination pair, make it an excellent candidate for applying power consumption reduction techniques. Such techniques are being increasingly applied in computer systems and the interconnection network is not an exception, since its contribution to the system power budget is not negligible. In this paper, we present a mechanism that dynamically switches on and off network links as a function of traffic. The mechanism is designed to guarantee network connectivity, according to the underlying routing algorithm. In this way, the default routing algorithm can be used regardless of the power saving actions taken, thus simplifying router design. Our simulation results show that significant network power consumption reductions can be obtained at no cost. Latency remains the same although the number of operating network links is dynamically adjusted",
   	booktitle = "Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International",
   	doi = "10.1109/IPDPS.2006.1639599",
   	isbn = "1-4244-0054-6",
   	journal = "Proceedings. 20th International Parallel and Distributed Processing Symposium (IEEE Cat. No.06TH8860)",
   	keywords = "energy conservation;multiprocessor interconnection networks;parallel processing;trees;",
   	month = "Apr.",
   	note = "dynamic power saving;fat-tree interconnection networks;on/off links;high-performance parallel computers;routing algorithm;network power consumption reduction;",
   	pages = "8 pp. -",
   	publisher = "IEEE Computer Society",
   	title = "{D}ynamic power saving in fat-tree interconnection networks using on/off links",
   	url = "http://dx.doi.org/10.1109/IPDPS.2006.1639599",
   	year = 2006
   }
   

5. Marina Alonso, Juan Miguel Martínez, Vicente Santonja, Pedro Lopez and Jose Duato. Power Saving in Regular Interconnection Networks Built with High-Degree Switches. In Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International. April 2005, 5b - 5b. URL, DOI BibTeX

   @conference{1419820,
   	author = "Alonso, Marina and Mart{\'i}nez, Juan Miguel and Santonja, Vicente and Lopez, Pedro and Duato, Jose",
   	abstract = "Nowadays, high-degree switches are available as building blocks of the interconnection network of clusters of PCs. An alternative to take advantage of the high number of switch ports is to connect every pair of switches through not only one but several links (this is known as link trunking in other environments). This extra connectivity can be exploited by using adaptive routing algorithms, thus improving network throughput and reducing network congestion. However with low traffic loads, all the links that compose the trunk link will not be utilized, but this idle links continue consuming power. Power consumption reduction techniques are being applied everywhere in computer systems and the interconnection network is not an exception, as its contribution is not negligible. In this paper, we present a mechanism that dynamically switches on and off network links as a function of traffic. It is specially targeted to those networks where trunk links are used. The mechanism can switch off any link, provided that network connectivity is guaranteed, (i.e. every pair of switches should be connected through at least one active link). Indeed, this restriction makes possible to use the same routing algorithm regardless the power saving actions taken, thus simplifying router design. Our simulation results show that the network power consumption can be greatly reduced, at the expense of some increase in latency. Nevertheless, it is shown that the power reduction is always higher that this latency increase.",
   	booktitle = "Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International",
   	doi = "10.1109/IPDPS.2005.349",
   	isbn = "0-7695-2312-9",
   	keywords = "PC clusters; adaptive routing algorithm; high-degree switch; link trunking; network congestion; network link; network throughput; power consumption; power saving; regular interconnection network; telecommunication traffic; power consumption; telecommunic",
   	month = "april",
   	pages = "5b - 5b",
   	title = "{P}ower {S}aving in {R}egular {I}nterconnection {N}etworks {B}uilt with {H}igh-{D}egree {S}witches",
   	url = "http://dx.doi.org/10.1109/IPDPS.2005.349",
   	year = 2005
   }
   

6. Marina Alonso, Juan Miguel Martínez, Vicente Santonja, Pedro Lopez and Jose Duato. Power saving in regular interconnection networks built with high-degree switches. 2005, 10 pp. -. BibTeX

   @conference{8539357,
   	author = "Alonso, Marina and Mart{\'i}nez, Juan Miguel and Santonja, Vicente and Lopez, Pedro and Duato, Jose",
   	abstract = "Nowadays, high-degree switches are available as building blocks of the interconnection network of clusters of PCs. An alternative to take advantage of the high number of switch ports is to connect every pair of switches through not only one but also several links (this is known as link trunking in other environments). This extra connectivity can be exploited by using adaptive routing algorithms, thus improving network throughput and reducing network congestion. However with low traffic loads, all the links that compose the trunk link will not be utilized, but this idle links continue consuming power. Power consumption reduction techniques are being applied everywhere in computer systems and the interconnection network is not an exception, as its contribution is not negligible. In this paper, we present a mechanism that dynamically switches on and off network links as a function of traffic. It is specially targeted to those networks where trunk links are used. The mechanism can switch off any link, provided that network connectivity is guaranteed, (i.e. every pair of switches should be connected through at least one active link). Indeed, this restriction makes possible to use the same routing algorithm regardless the power saving actions taken, thus simplifying router design. Our simulation results show that the network power consumption can be greatly reduced, at the expense of some increase in latency. Nevertheless, it is shown that the power reduction is always higher that this latency increases",
   	address = "Los Alamitos, CA, USA",
   	journal = "Proceedings. 19th IEEE International Parallel and Distributed Processing Symposium",
   	keywords = "power consumption;telecommunication congestion control;telecommunication links;telecommunication network routing;telecommunication switching;telecommunication traffic;workstation clusters;",
   	note = "power saving;regular interconnection network;high-degree switch;PC clusters;link trunking;adaptive routing algorithm;network throughput;network congestion;power consumption;telecommunication traffic;network link;",
   	pages = "10 pp. -",
   	title = "{P}ower saving in regular interconnection networks built with high-degree switches",
   	year = 2005
   }
   

7. Marina Alonso, J M Martinez, Vicente Santonja and Pedro Lopez. Reducing power consumption in interconnection networks by dynamically adjusting link width. 2004, 882 - 90. BibTeX

   @conference{8314163,
   	author = "Alonso, Marina and J.M. Martinez and Santonja, Vicente and Lopez, Pedro",
   	abstract = "The huge increase both in size and complexity of high-end multiprocessor systems has triggered their power consumption. Air or liquid cooling systems are needed, which, in turn, increases power consumption. Another important percentage of the consumption is due to the interconnection network. In this paper, we propose a mechanism that dynamically reduces the available network bandwidth when traffic becomes low. Unlike other approaches that completely switch links off when they are not fully utilized, our mechanism is based on reducing their bandwidth by narrowing their width. As the topology of the network is not modified, the same routing algorithm can be used regardless of the power consumption level, which simplifies the router design. By using this strategy, the consumption may be strongly reduced. In fact, the lower bound of this reduction is a design parameter of the mechanism. The price to pay is an increase in the message latency with low network loads",
   	address = "Berlin, Germany",
   	journal = "Euro-Par 2004 Parallel Processing. 10th International Euro-Par Conference. Proceedings (Lecture Notes in Comput. Sci. Vol.3149)",
   	keywords = "bandwidth allocation;multiprocessor interconnection networks;power consumption;telecommunication links;telecommunication network routing;telecommunication traffic;",
   	note = "power consumption reduction;interconnection networks;link width adjustment;multiprocessor systems;network bandwidth;",
   	pages = "882 - 90",
   	title = "{R}educing power consumption in interconnection networks by dynamically adjusting link width",
   	year = 2004
   }
   

8. Marina Alonso and Vicente Santonja. A new destage algorithm for disk cache: DOME. In EUROMICRO Conference, 1999. Proceedings. 25th vol.1. 1999, 416 - 23. URL, DOI BibTeX

   @conference{6364156,
   	author = "Alonso, Marina and Santonja, Vicente",
   	abstract = "Microprocessor technology is advancing at an incredible rate, unfortunately disk technology is not increasing at the same rate; thus, disk subsystem performance is becoming a dominant factor in the overall system behaviour. Disk caches have been effective to improve I/O performance. Several studies show that disk access patterns are dominated by write operations, then the use of non-volatile write caches together with a write-behind strategy seems to be essential. In this paper, a new destage algorithm for disk write caches, called DOME (Destage Only Modified oncE), is presented. Using simulation, DOME is compared with other preceding algorithms such as the threshold scheduling, providing better response time and behaviour, not only for write requests, but also for read requests. These results have been obtained feeding the simulator with real traces",
   	booktitle = "EUROMICRO Conference, 1999. Proceedings. 25th",
   	doi = "http://dx.doi.org/10.1109/EURMIC.1999.794503",
   	isbn = "0-7695-0321-7",
   	journal = "Proceedings 25th EUROMICRO Conference. Informatics: Theory and Practice for the New Millennium",
   	keywords = "cache storage;magnetic disc storage;",
   	month = "Sep.",
   	note = "destage algorithm;disk cache;DOME;microprocessor technology;disk subsystem performance;system behaviour;disk access patterns;write operations;destage only modified once;threshold scheduling;real traces;",
   	pages = "416 - 23",
   	publisher = "IEEE Computer Society Press",
   	title = "{A} new destage algorithm for disk cache: {DOME}",
   	url = "http://dx.doi.org/10.1109/EURMIC.1999.794503",
   	volume = "vol.1",
   	year = 1999
   }
   

9. Vicente Santonja, Xavier Molero, Marina Alonso, J J Serrano and P Gil. Influence of on-line spare disks and duplicated controllers on RAID dependability. In Dependable Computing for Critical Applications 6. 1998, 249 - 70. BibTeX

   @conference{6369403,
   	author = "Santonja, Vicente and Molero, Xavier and Alonso, Marina and J.J. Serrano and P. Gil",
   	abstract = "This paper shows how the use of stochastic activity networks (SAN) can facilitate the construction of dependability models through the flexibility in their definition and their approach to hierarchical design. A basic model of the RAID level 5 dependability is initially designed. Then, this basic model is extended to include a pool of on-line spare disks. The influence of the number of spares and the replacement policy is then analyzed. However RAIDs consist of disk drives and other components (controllers, cabling, power supplies, etc.) that can also fail. In our models, failures of these support hardware components are considered and benefits for reliability obtained by making these components redundant are studied. Two organizations with duplicated controllers are also compared",
   	booktitle = "Dependable Computing for Critical Applications 6",
   	isbn = 9780818680090,
   	journal = "Dependable Computing and Fault-Tolerant Systems. Vol.11. Dependable Computing for Critical Applications 6",
   	keywords = "fault tolerant computing;RAID;redundancy;",
   	note = "on-line spare disks;duplicated controllers;RAID dependability;stochastic activity networks;replacement policy;reliability;",
   	pages = "249 - 70",
   	publisher = "IEEE Computer Society",
   	title = "{I}nfluence of on-line spare disks and duplicated controllers on {RAID} dependability",
   	year = 1998
   }
   

10. Vicente Santonja, Marina Alonso, Xavier Molero, Juan Serrano, Pedro Gil and Rafael Ors. Dependability models of RAID using stochastic activity networks. In Andrzej Hlawiczka, João Silva and Luca Simoncini (eds.). Dependable Computing — EDCC-2. Lecture Notes in Computer Science series, volume 1150, Springer Berlin / Heidelberg, 1996, pages 141-158. URL, DOI BibTeX

    @incollection{springerlink:10.1007/3-540-61772-8_35,
    	author = "Santonja, Vicente and Alonso, Marina and Molero, Xavier and Juan Serrano and Pedro Gil and Rafael Ors",
    	abstract = "The development of CTMCs to model RAIDs with a general failure-repair process seems a complex task. The introduction of a technique with higher modeling level, that facilitates the description of the failure-repair processes is essential to deepen in the dependability analysis of these systems.",
    	booktitle = "Dependable Computing — EDCC-2",
    	doi = "10.1007/3-540-61772-8_35",
    	editor = "Hlawiczka, Andrzej and Silva, Jo{\~a}o and Simoncini, Luca",
    	note = "10.1007/3-540-61772-8_35",
    	pages = "141-158",
    	publisher = "Springer Berlin / Heidelberg",
    	series = "Lecture Notes in Computer Science",
    	title = "{D}ependability models of {RAID} using stochastic activity networks",
    	url = "http://dx.doi.org/10.1007/3-540-61772-8_35",
    	volume = 1150,
    	year = 1996
    }